发明名称 SYSTEM, METHOD, PROGRAM, COMPILER AND RECORD CARRIER
摘要 A processor system is described comprising at least a first and a second processor element (PEI, PE2). The first processor element (PEI) has a cluster request indicator (CR12) related to the second processor element and the second processor element (PE2) has a cluster request indicator (CR21) related to the first processor element. The processor elements have an instruction set enabling dynamic control of the indicators. The indicators (CR12, CR21) have a value range comprising at least a first value (positive indicator) indicating that the processor element requests to form a cluster with the related processor element, and a second value (negative indicator) indicating that the processor element does not request to form a cluster with the related processor element. The system further comprises a cluster control facility (CC12) which detects the value of the cluster request indicator and organizes the processor elements in clusters in accordance with the detected values. Two processor elements belong to the same cluster if they have positive indicators related to each other, or if there is a sequence of processor elements comprising those two processor elements wherein each pair of subsequent processor elements has positive indicators related to each other.
申请公布号 WO2005003991(B1) 申请公布日期 2005.12.01
申请号 WO2004IB51055 申请日期 2004.06.30
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V.;PIRES DOS REIS MOREIRA, ORLANDO, M.;VAN ACHT, VICTOR, M., G.;DE OLIVEIRA KASTRUP PEREIRA, BERNARDO 发明人 PIRES DOS REIS MOREIRA, ORLANDO, M.;VAN ACHT, VICTOR, M., G.;DE OLIVEIRA KASTRUP PEREIRA, BERNARDO
分类号 G06F9/50;G06F15/78;G06F15/80;(IPC1-7):G06F15/78 主分类号 G06F9/50
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