| 摘要 |
PROBLEM TO BE SOLVED: To minimize (optimize) the number of delay compensation elements, to reduce a wiring region, to improve a structure of a circuit in a semiconductor device, and to reduce a chip area. SOLUTION: Automatic arranging and wiring equipment is used with an initial arranging/wiring part 7-1, a delay compensation element arranging part 7-2, and an arrangement optimizing part 7-3. The initial arranging/wiring part 7-1 arranges and wires a function block in the arrangement/wiring region of the semiconductor device based on circuit drawing data, function block data, and design rule data. The delay compensation element arranging part 7-2 inserts the delay compensation element into objective wiring satisfying a prescribed condition in wiring. The arrangement optimizing part 7-3 reduces the number of the delay compensation elements, and changes wiring of objective wiring in objective wiring where a plurality of the delay compensation elements are arranged. COPYRIGHT: (C)2006,JPO&NCIPI
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