发明名称 Semiconductor memory device and method of manufacturing the same
摘要 A memory cell MC comprises one MOS transistor having a floating bulk region which is electrically isolated from others. A gate electrode 13 of the MOS transistor is connected to a word line WL, a drain diffusion region 14 thereof is connected to a bit line BL, and a source diffusion region 15 thereof is connected to a fixed potential line SL. The memory cell stores a first threshold state in which majority carriers produced by impact ionization are injected and held in the bulk region 12 of the MOS transistor and a second threshold state in which the majority carriers in the bulk region 12 of the MOS transistor are emitted by a forward bias at a pn junction on the drain side as binary data. Thereby, a semiconductor memory device in which a simple transistor structure is used as a memory cell, enabling dynamic storage of binary data by a small number of signal lines can be provided. <IMAGE>
申请公布号 EP1180799(A3) 申请公布日期 2005.09.28
申请号 EP20010119605 申请日期 2001.08.17
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OHSAWA, TAKASHI
分类号 G11C7/18;G11C11/404;G11C11/406;G11C11/4076;G11C11/4097;H01L21/8242;H01L21/84;H01L27/108;H01L27/12;H01L29/76 主分类号 G11C7/18
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