发明名称 Dynamic complexity prediction and regulation of MPEG2 decoding in a media processor
摘要 A method and system of regulating the computation load of an MPEG decoder in a video processing system are provided. The video processing system processes the header information of a compressed video data stream including a plurality of macroblocks with a motion vector associated therewith. Then, the computation load of each functional block of the MPEG decoder is adjusted according to predetermined criteria; thus, substantial computational overhead is desirably avoided.
申请公布号 US6925126(B2) 申请公布日期 2005.08.02
申请号 US20010837036 申请日期 2001.04.18
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 LAN TSE-HUA;CHEN YINGWEI;ZHONG ZHUN
分类号 H04N7/32;G06T9/00;H04N7/24;H04N7/26;H04N7/30;H04N7/50;(IPC1-7):H04N7/12 主分类号 H04N7/32
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