| 摘要 |
A packet identification device which is capable of achieving high-speed packet identification while suppressing an increase in circuit size. A lookup table stores a plurality of reference data each divided into unit data associated with respective attributes, in a distributed manner in respective storage areas having addresses defined on an attribute-by-attribute basis, and is operable when a reading address is input, to output a plurality of unit data associated with one of the attributes corresponding to the reading address. An analysis circuit analyzes an attribute of a comparison data item in the input packet. An address control circuit outputs an address corresponding to the attribute of the comparison data item analyzed by the analysis circuit to the lookup table, as the reading address. A plurality of unit comparison circuits are provided in association with the plurality of reference data, respectively, for each performing comparison between an associated one of the plurality of unit data output from the lookup table and the comparison data item analyzed by the analysis circuit.
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