| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a device and method for controlling a memory, capable of preventing the complexity of wiring caused by many pieces of intersecting wiring and reduction in yield or quality. <P>SOLUTION: When a memory chip CC2 is selected by a memory control device CC1, an internal circuit of a switching circuit 27 is switched by a switching signal SWS2 so as to input a selection signal S2 outputted from an internal circuit 40 to the predetermined memory terminal of the memory chip CC2. The selection signal S2 is entered into the corresponding memory terminal of the memory chip CC2 via the switching circuit 27, whereby the memory chip CC2 is activated to enable the entering/outputting of control signals 21 to 25. The control signals 21 to 25 are switched by the switching circuit 27 in a signal order according to the terminal arrangement order of the memory terminals 21a to 27a of the memory chips CC2, and then allocated to control terminals P21 to P27. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
