| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a clock generator for improving modulation precision without increasing current consumption by stationary current when spread spectrum for a clock signal is carried out. <P>SOLUTION: A phase balanced voltage Vf to be inputted to a voltage control oscillator (VCO) 9 is modulated in a dead band area where difference signals Pr, Pp are not outputted from a charge pump circuit 7 in the case of detecting an oscillation frequency difference between an output clock signal fo and a reference clock signal fr. Accordingly, the output clock signal fo is varied within the range of a lock frequency in a PLL circuit so as to perform the spread spectrum of the output clock signal fo, while keeping the lock state of an oscillation frequency in the PLL circuit. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
