发明名称 INTERRUPTION CONTROLLER, MICROCOMPUTER AND ELECTRONIC EQUIPMENT
摘要 PROBLEM TO BE SOLVED: To provide an interruption controller etc. for preventing the generation of the overhead of hardware setting change processing necessary for the change of an interruption order. SOLUTION: The interruption controller 10 generates an interrupting signal and an interrupting vector corresponding to a plurality of interruption factors ranging from the first interruption factor to the n-th interruption factor, and the interruption controller 10 is provided with: an interruption factor storing part 40 which receives a plurality of interruption factor signals ranging from the first interruption factor to the n-th interruption factor, and stores an interruption factor value corresponding to the interruption factor; an interrupting vector generating circuit 60 which generates an interrupting vector based on a priority order made to correspond to each interrupting factor; and a priority order cyclic movement (rotation) circuit 80 which executes the cyclic movement of the priority order of the interruption factors ranging from the first interruption factor to the n-th interruption factor when receiving the reset signal of the interrupting factor whose priority order is the highest among the interrupting factor signals ranging from the first interrupting factor to the n-th interrupting factor. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005165548(A) 申请公布日期 2005.06.23
申请号 JP20030401792 申请日期 2003.12.01
申请人 SEIKO EPSON CORP 发明人 HASHIMOTO YOSHIAKI
分类号 G06F9/48;G06F9/46;(IPC1-7):G06F9/46 主分类号 G06F9/48
代理机构 代理人
主权项
地址