发明名称 Method for forming a self-aligned buried strap in a vertical memory cell
摘要 A method for forming a self-aligned buried strap in a vertical memory cell. A semiconductor substrate with a trench is provided. A collar dielectric layer is conformally formed on the trench bottom portion, and the trench is filled with a conducting layer. The collar dielectric layer is etched below the level of the surface of the conducting layer to form a groove between the conducting layer and the trench. The groove is filled with a doped conducting layer. The dopant in the doped conducting layer is diffused to the semiconductor substrate in an ion diffusion area as a buried strap. The conducting layer and the doped conducting layer are etched below the ion diffusion area. A top trench insulating layer is formed on the bottom of the trench, wherein the top trench insulating layer is lower than the ion diffusion area.
申请公布号 US2005124111(A1) 申请公布日期 2005.06.09
申请号 US20040846321 申请日期 2004.05.14
申请人 NANYA TECHNOLOGY CORPORATION 发明人 HUANG CHENG-CHIH;YANG SHENG-WEI;SHIH NENG-TAI;HUANG CHEN-CHOU
分类号 H01L21/02;H01L21/8242;(IPC1-7):H01L21/823;H01L21/823;H01L21/824;H01L21/20 主分类号 H01L21/02
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