发明名称 |
Sacrificial dielectric planarization layer |
摘要 |
A method of forming a microelectronic structure and its associated structures is described. In one embodiment, a substrate is provided with a sacrificial layer disposed on a hard mask layer, and a metal layer disposed in a trench of the substrate and on the sacrificial layer. The metal layer is then removed at a first removal rate wherein a dishing is induced on a top surface of the metal layer until the sacrificial layer is exposed, and simultaneously removing the metal layer and the sacrificial layer at a second removal rate without substantially removing the hard mask.
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申请公布号 |
US2005070093(A1) |
申请公布日期 |
2005.03.31 |
申请号 |
US20030674579 |
申请日期 |
2003.09.29 |
申请人 |
BARNS CHRIS E.;O'BRIEN KEVIN P.;MILLER ANNE E. |
发明人 |
BARNS CHRIS E.;O'BRIEN KEVIN P.;MILLER ANNE E. |
分类号 |
H01L21/3105;H01L21/311;H01L21/321;H01L21/4763;H01L21/768;H01L21/8238;(IPC1-7):H01L21/476 |
主分类号 |
H01L21/3105 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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