发明名称 Method for reducing the effective thickness of gate oxides by nitrogen implantation and anneal
摘要 A method for reducing the effective thickness of a gate oxide using nitrogen implantation and anneal subsequent to dopant implantation and activation is provided. More particularly, the present invention provides a method for fabricating semiconductor devices, for example, transistors, which include a hardened gate oxide and which may be characterized by a relatively large nitrogen concentration at the polysilicon/gate oxide interface and a relatively small nitrogen concentration within the gate oxide and at the gate oxide/substrate interface. Additionally, the present invention provides a method for fabricating a semiconductor device having a metal gate strap (e.g., a metal silicide layer) disposed over the polysilicon layer thereof, which device includes a hardened gate oxide and which may be characterized by a relatively large nitrogen concentration at the silicide/polysilicon interface to substantially prevent cross-diffusion.
申请公布号 US2005048746(A1) 申请公布日期 2005.03.03
申请号 US20030651314 申请日期 2003.08.28
申请人 WANG ZHONGZE 发明人 WANG ZHONGZE
分类号 H01L21/28;H01L29/51;(IPC1-7):H01L21/76;H01L21/336;H01L21/425 主分类号 H01L21/28
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