发明名称 IC CIRCUIT STRUCTURE FOR REDUCING WASTE OF GPIO PORT
摘要 PURPOSE: An IC circuit structure for reducing waste of a GPIO(General Purpose Input/Output) port is provided to reduce a device manufacturing expense by using one port to a control operation of other purpose, as an IO signal is processed with one GPIO port by parallel connecting an IO line between device ID and a processor ID. CONSTITUTION: The IC circuit structure comprises the processor IC(202) equipped with the one GPIO port and the device IC(200) connected to the GPIO port of the processor IC. The IO port of the device IC is connected to the one GPIO port of the processor IC in parallel and both ICs interchange IO data. Thus, IO control operation of the device IC is performed with the one GPIO port. The processor IC and the device IC are equipped with a strobe and clock signal port.
申请公布号 KR20050015354(A) 申请公布日期 2005.02.21
申请号 KR20030054138 申请日期 2003.08.05
申请人 DAEWOO ELECTRONICS CORPORATION 发明人 KIM, JI HOON
分类号 G06F13/14;(IPC1-7):G06F13/14 主分类号 G06F13/14
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