发明名称 System and method for clock independent pulse width modulation
摘要 A method of clocking a video processing circuit is performed by stalling a reference clock signal. The reference clock signal is stalled based on a stall signal from a clock-independent pulse width modulator. The stalled reference clock signal is used to produce a video clock signal for use by an image data processing circuit.
申请公布号 US6856340(B2) 申请公布日期 2005.02.15
申请号 US20030353687 申请日期 2003.01.28
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 MORRISON ROBERT D.;MEADOR JACK L.
分类号 B41J2/47;G03G15/00;G03G15/043;G03G21/14;(IPC1-7):B41J2/47 主分类号 B41J2/47
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