发明名称 VLSI implementation of metastability-based random number generator using delay ladders
摘要 A random number generator includes a chain of pairs of D-type flip-flops 205, 215 . . . having D and L inputs, a chain of substantially identical cascaded upper buffers 210,220 . . . each having a predetermined delay d1 and respective output taps. There is a chain of substantially identical cascaded lower buffers 240,260 . . . each having a predetermined delay d2, and respective output taps, wherein d1<>d2. A first one of the pair of D-type flip flops 205 has its D and L inputs connected to a respective output tap of one of the upper buffers 210 and a respective output tap of one of the lower buffers 240, and a second one of the pair of D-type flip flops has its D and L inputs connected to a respective output tap of one of the lower buffers 260 and a respective output of one of the upper buffers 215. The common clock input 201 is connected to the first inputs of both the cascaded upper buffers and the cascaded lower buffers 210, 220 . . . and 240, 260 . . . . A metastability detector 275,280 285,290,295 . . . for each individual flip-flop of the chain of flip flops, and a respective metastability detector connected to the Q output of each respective flip-flop. The metastability detectors have a counting feature to count a number of times that each of the respective metastability detector signals a metastable state, and one flip-flop of the pair flip-flops having the most metastable detector states is selected to generate random numbers from its output.
申请公布号 US2005004959(A1) 申请公布日期 2005.01.06
申请号 US20040801768 申请日期 2004.03.15
申请人 HARS LASZLO 发明人 HARS LASZLO
分类号 G06F1/02;(IPC1-7):G06F1/02 主分类号 G06F1/02
代理机构 代理人
主权项
地址