FIELD EFFECT TRANSISTOR

摘要

An electric-field moderating layer (12) and a p-type buffer layer (2) are formed on an SiC single crystal substrate (1). The electric-field moderating layer (12) is so formed between the p-type buffer layer (2) and the SiC single crystal substrate (1) that it is in contact with the SiC single crystal substrate (1). An n-type semiconductor layer (3) is formed on the p-type buffer layer (2). A p-type semiconductor layer (10) is formed on the n-type semiconductor layer (3). An n<+>-type source region layer (4) and an n<+>-type drain region layer (5) are formed at a certain distance from each other within the p-type semiconductor layer (10). A p<+>-type gate region layer (6) is formed in a portion of the p-type semiconductor layer (10) lying between the n<+>-type source region layer (4) and the n<+>-type drain region layer (5).