发明名称 Method for forming buried wiring and semiconductor device
摘要 A TaN film and a Cu film are deposited successively over an insulating film formed with trenches. Then, a first CMP process is performed by using a slurry having a polishing rate for Cu sufficiently higher than a polishing rate for TaN and containing an agent for forming a protective film for Cu in a sufficient amount. As a result, the upper surface of the portion of the Cu film located in each of the trenches is positioned flush with the upper surface of TaN. Then, a second CMP process is performed under such a condition that the polishing rate for Cu is equal to or higher than the polishing rate for TaN, thereby forming Cu wires. By properly changing conditions for the second CMP process in accordance with the level of the upper surface of the Cu film, the upper surface of the Cu film is positioned flush with or lower in level than the upper surface of the insulating film after the second CMP process so that the occurrence of defective wiring is reduced.
申请公布号 US2004248401(A1) 申请公布日期 2004.12.09
申请号 US20040859217 申请日期 2004.06.03
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 SATAKE MITSUNARI;MATSUMOTO MUNEYUKI
分类号 H01L21/3205;C09G1/02;H01L21/304;H01L21/321;H01L21/768;(IPC1-7):H01L21/476 主分类号 H01L21/3205
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