| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a PLL circuit capable of reducing spurious of output of a voltage controlled oscillator (VCO) via an input line of the voltage controlled oscillator (VCO) and also spurious via a power line or a ground line. <P>SOLUTION: Frequency variation of a PLL by undesirable power potential variation is minimized by canceling frequency variation caused by power potential variation of the voltage controlled oscillator and frequency variation caused by variation of the voltage controlled oscillator (VCO) control terminal by performing constant number multiplication of undesirable power potential variation of the voltage controlled oscillator (VCO) and providing the power potential variation to a voltage controlled oscillator (VCO) control terminal. A positive potential line which synchronously operates with the power source voltage line of the voltage controlled oscillator (VCO) and a negative potential line which synchronously operates with a ground line of the voltage controlled oscillator (VCO) are provided and a loop filter is formed between the positive and negative potential lines for performing constant number multiplication of the undesirable power potential variation of the voltage controlled oscillator (VCO) and providing it to the voltage controlled oscillator (VCO) control terminal. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
