发明名称 |
Test structure for testing the depth of trench etchings in SOI wafers has a row of connected islands after etching insulating trenches, in which each island is surrounded by a trench which has a different width from island to island |
摘要 |
<p>Test structure has a row of connected islands (A-E) after etching insulating trenches, in which each island is surrounded by a trench which has a different width from island to island while including a trench that appears in the form of an insulating trench in an active circuit. A section of the surrounding trench (a-e) of each island forms a common piece with the trench of adjacent islands. The respective section has, in the inner islands, the width of the adjacent trench having the next larger or next smaller measure of width in the row. An independent claim is also included for a process for testing the depth of trench etchings in SOI wafers using the above structure.</p> |
申请公布号 |
DE10317748(A1) |
申请公布日期 |
2004.11.11 |
申请号 |
DE2003117748 |
申请日期 |
2003.04.17 |
申请人 |
X-FAB SEMICONDUCTOR FOUNDRIES AG |
发明人 |
LERNER, RALF |
分类号 |
H01L23/544;(IPC1-7):H01L21/764;H01L21/66;H01L21/308 |
主分类号 |
H01L23/544 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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