发明名称 |
MEMORY SUBSYSTEM INCLUDING MEMORY MODULES HAVING MULTIPLE BANKS |
摘要 |
A memory subsystem including memory modules having multiple banks. A memory subsystem includes a memory controller and a plurality of memory modules. The plurality of memory modules may be coupled to the memory controller by a memory interconnect having a data path including a plurality of data bits. Each of the plurality of memory modules includes a circuit board and a plurality of memory chips mounted to the circuit board. The circuit board includes a connector edge for connection to the memory interconnect. Each of the plurality of memory chips may be configured to store data in a plurality of storage locations. Each of the plurality of memory modules may be coupled to a respective mutually exclusive subset of the plurality of data bits. |
申请公布号 |
WO2004061671(A3) |
申请公布日期 |
2004.11.11 |
申请号 |
WO2003US38917 |
申请日期 |
2003.12.09 |
申请人 |
SUN MICROSYSTEMS, INC. |
发明人 |
DOBLAR, DREW, G.;WU, CHUNG-HSIAO, R. |
分类号 |
G06F12/00;G06F13/16;G06F13/42 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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