发明名称 Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules
摘要 A layout for simultaneously sub-accessible memory modules is disclosed. In one embodiment, a memory module includes a printed circuit board having a plurality of sectors, each sector being electrically isolated from the other sectors and having a multi-layer structure. At least one memory device is attached to each sector, the memory devices being organized into a plurality of memory ranks. A driver is attached to the printed circuit board and is operatively coupled to the memory ranks. The driver is adapted to be coupled to a memory interface of the computer system. Because the sectors are electrically-isolated from adjacent sectors, the memory ranks are either individually or simultaneously, or both individually and simultaneously accessible by the driver so that one or more memory devices on a particular sector may be accessed at one time. In an alternate embodiment, the printed circuit board includes a driver sector electrically isolated from the other sectors and having a multi-layer structure, the driver being attached to the driver sector.
申请公布号 US2004225853(A1) 申请公布日期 2004.11.11
申请号 US20030434578 申请日期 2003.05.08
申请人 LEE TERRY R.;JEDDELOH JOSEPH M. 发明人 LEE TERRY R.;JEDDELOH JOSEPH M.
分类号 H05K1/00;H05K1/18;(IPC1-7):G06F12/00 主分类号 H05K1/00
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