发明名称 MEMORY CONTROL DEVICE AND MEMORY CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To change each storage area in a memory to a power-saving mode while retaining data continuously located in a plurality of storage areas in the memory. SOLUTION: When data 41-44 stored in banks #1-#4 in an SDRAM 2 are used in a predetermined processing mode of CPU 11, a data transfer means 7 outputs a data address signal 17 for relocation of data to an access means 10 according to a relocation address signal 4 from a storage means 6. The access means 10 performs DMA transfer according to the data address signal 17, and collects the data 41-44 in the SDRAM 2 to a RAM 3. Further, according to a power-saving control signal 20, the four banks #1-#4 are changed to the power-saving mode. Thereafter, an address conversion means 9 converts the relocation address signal 4 to a converted address signal 21 every memory access from the CPU 11 according to the relocation address signal 4. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004272448(A) 申请公布日期 2004.09.30
申请号 JP20030060016 申请日期 2003.03.06
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMASHITA SEIJI;TAKEMOTO YUSUKE
分类号 G06F12/02;G06F12/06;(IPC1-7):G06F12/02 主分类号 G06F12/02
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