发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To shorten the time required for setting, inspecting, etc., of voltages for data writing and erasing after manufacturing by nearly automatically and stably generating the voltages for data writing and erasing having an optimum value in an EEPROM. <P>SOLUTION: The semiconductor integrated circuit device comprises a boosting circuit 20 which boosts a power-supply voltage and generates a prescribed intermediate potential, a voltage setting circuit 22 which sets the output voltage of the boosting circuit 20 at an arbitrary value based on control data, a selecting circuit which selectively supplies the control data given from outside the device or the control data stored in a nonvolatile manner within the device, a memory cell array 10 in which memory cells consisting of MOSFETs having floating gates and control gates are arrayed in a matrix form, a plurality of wordlines WL for selectively controlling the memory cells of the memory cell array and a plurality of bit lines BL for transferring and receiving data between the memory cells of the memory cell array. The device is so constituted that the output voltage of the boosting circuit 20 is supplied to the bit lines which are not subjected to writing during writing of the data to the memory cell array. <P>COPYRIGHT: (C)2004,JPO&NCIPI</p>
申请公布号 JP2004247042(A) 申请公布日期 2004.09.02
申请号 JP20040111150 申请日期 2004.04.05
申请人 TOSHIBA CORP 发明人 ITO YASUO
分类号 G11C16/06;G11C16/02;G11C16/04;(IPC1-7):G11C16/06 主分类号 G11C16/06
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