发明名称
摘要 A clocked-scan flip-flop for multi-threshold CMOS (MTCMOS) is provided. The clocked-scan flip-flop includes a first switching unit which switches normal data that are input from the outside and outputs the data; a second switching unit which switches scan data that are input from the outside and outputs the data; a latch unit which latches the data input from the first switching unit or the second switching unit; and a clock input unit which controls the switching operations of the first and second switching units according to the result of a predetermined operation on a clock signal and a scan clock signal that are input from the outside. The clocked-scan flip-flop has the characteristics of a complementary pass-transistor (CP) flip-flop, that is, low power consumption and high performance. Also, the clocked-scan flip-flop provides a full-scale scan function for test purposes.
申请公布号 KR100446303(B1) 申请公布日期 2004.08.30
申请号 KR20020045329 申请日期 2002.07.31
申请人 发明人
分类号 G01R31/28;H03K3/037;G01R31/3185;G06F11/22;H01L21/822;H01L27/04;H03K3/012 主分类号 G01R31/28
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