发明名称 |
METHOD FOR FORMING COPPER ELECTRIC WIRING ON SUBSTRATE |
摘要 |
PROBLEM TO BE SOLVED: To provide a technology for forming a fine circuit wiring having a superior embedding property of copper and a high electrical reliability on a substrate provided with a fine circuit pattern for an electronic circuit such as a silicon wafer, without producing defects such as a seam void in a channel, by electroless copper plating. SOLUTION: A method for forming the copper electric wiring on the substrate having the fine circuit pattern and a metal seed layer formed thereon for the electronic circuit, comprises immersing the substrate in a treatment liquid containing a polymer component, and subjecting it to electroless copper plating. COPYRIGHT: (C)2004,JPO&NCIPI
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申请公布号 |
JP2004197169(A) |
申请公布日期 |
2004.07.15 |
申请号 |
JP20020367469 |
申请日期 |
2002.12.19 |
申请人 |
EBARA CORP;EBARA UDYLITE KK;NAWAFUNE HIDEMI |
发明人 |
FUKUNAGA AKIRA;ONO KANJI;KIMIZUKA RYOICHI;MATSUMOTO MORIHARU;NAWAFUNE HIDEMI |
分类号 |
C23C18/16;C23C18/31;C23C18/40;H01L21/28;H01L21/288;H01L21/3205;H01L23/52;(IPC1-7):C23C18/16;H01L21/320 |
主分类号 |
C23C18/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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