发明名称 Wafer scale method of packaging integrated circuit die
摘要 A chip scale package structure formed by adhering a glass sheet having a pattern of holes matching a pattern of bond pads on a semiconductor wafer so that the pattern of holes on the glass sheet are over the pattern of bond pads on the semiconductor wafer. Metallized pads are formed on the glass sheet adjacent to each hole and in one embodiment a conductive trace is formed from each metallized pad on the glass sheet to the bond pad on the semiconductor wafer under the adjacent hole. In a second embodiment, a pad is formed on the glass sheet adjacent to each hole and the pad extends down the sides of the adjacent hole. The hole is filled with a metal plug that electrically connects the pad on the glass sheet to the bond pad on the semiconductor wafer. In each embodiment, a solder ball is formed on each pad on the glass sheet.
申请公布号 US6753208(B1) 申请公布日期 2004.06.22
申请号 US20020224197 申请日期 2002.08.19
申请人 MCSP LLC 发明人 MACINTYRE DONALD MALCOLM
分类号 H01L21/60;H01L23/31;H01L23/485;(IPC1-7):H01L21/44;H01L21/48;H01L21/50;H01L23/48;H01L23/52 主分类号 H01L21/60
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