发明名称 Field emission arrays to optimize the size of grid openings and to minimize the occurrence of electrical shorts
摘要 A field emission array includes a dielectric structure with at least two dielectric layers between the cathode and anode grid thereof. The lower dielectric layer is planarized to minimize the occurrence of electrical shorts between the cathode and anode grid of the field emission array. Thus, the upper dielectric layer is substantially free of any electrically conductive defects or imperfections that extend through the lower dielectric layer. In addition, the field emission array includes an array of emitter tips, which are laterally surrounded and may be spaced apart from the dielectric structure. The field emission array may also include a grid over the dielectric structure and the emitter tips, with the emitter tips being exposed through grid openings or apertures.
申请公布号 US6731063(B2) 申请公布日期 2004.05.04
申请号 US20020266969 申请日期 2002.10.07
申请人 MICRON TECHNOLOGY, INC. 发明人 DERRAA AMMAR
分类号 H01J9/02;(IPC1-7):H01J1/304;H01J19/24 主分类号 H01J9/02
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