发明名称 Microprocessor chip simultaneous switching current reduction method and apparatus
摘要 Disclosed is an electronic chip containing a plurality of electronic circuit partitions, distributed over the area of the chip, each including a processor core and a clock phase domain different from cores in other partitions of the chip. A source of same frequency, but different phase clock signals representing different clock domains, provides different phase signals to adjacent partitions for the purpose of reducing instantaneous magnitude switching currents. Intra-chip communication circuitry distributes control and data signals between partitions.
申请公布号 US2004078613(A1) 申请公布日期 2004.04.22
申请号 US20020273617 申请日期 2002.10.17
申请人 IBM 发明人 BOERSTLER DAVID WILLIAM;DHONG SANG HOO;HOFSTEE HARM PETER;LIU PEICHUN PETER
分类号 G06F1/06;G06F1/10;(IPC1-7):G06F1/12 主分类号 G06F1/06
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