发明名称 MEMORY CONTROL DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor storage device that can accurately synchronize a strobe signal generated from a clock signal and digital data in a memory controller for inputting and outputting digital data into and from a DDR-SDRAM or the like. SOLUTION: Many output holding circuits 108 are respectively adjacent to every many data output terminals 105, and output delay circuits 112 in n/2 number are adjacent to twos of signal output terminals 106 in n number. A wiring length from the output holding circuits 108 to the data output terminals 105, and a wiring length from the output delay circuits 112 to the signal output terminals 106 are the same, so that delays in digital data transmitted from the output holding circuits 108 to the data output terminals 105 and in an output strobe signal transmitted from the output delay circuits 112 to the signal output terminals 106 can be the same. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004126772(A) 申请公布日期 2004.04.22
申请号 JP20020287331 申请日期 2002.09.30
申请人 NEC ELECTRONICS CORP 发明人 UNEME MASAKATSU
分类号 G06F12/00;F21V23/02;G06F1/10;G06F13/16;G11C11/401;(IPC1-7):G06F12/00 主分类号 G06F12/00
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