发明名称 DLL CIRCUIT FOR CORRECTING DUTY CYCLE AND CORRECTING METHOD THEREOF
摘要 <p>PURPOSE: A DLL(Delay Locked Loop) circuit for correcting a duty cycle and a correcting method thereof are provided to widen a range of DCC(Duty Cycle Corrector) and reduce the power consumption by correcting internally the duty cycle by without using a phase synthesizer. CONSTITUTION: A DLL circuit for correcting a duty cycle includes a phase detector(31), a first control circuit(32), a second control circuit(33), and a delay line unit(38). The phase detector(31) is used for generating an up/down signal corresponding to a phase difference between an external clock signal and an internal clock signal. The first control circuit(32) generates respectively the first and the second control signal to perform a coarse locking operation and a fine locking operation for the phase difference between the external clock signal and the internal clock signal in response to the up/down signal. The second control circuit(33) generates the third control signal for correcting a coarse duty error of the external clock signal and the fourth control signal for correcting a fine duty error of the internal clock signal in response to the up/down signal. The delay line unit(38) includes a plurality of delay cells to delay the external clock signal, outputs selectively output signals of the first delay cells and the second delay cells in response to the first control signals, and outputs selectively output signals of the third delay cells in response to the third control signals.</p>
申请公布号 KR20040031389(A) 申请公布日期 2004.04.13
申请号 KR20020060814 申请日期 2002.10.05
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHO, GEUN HUI;KIM, GYU HYEON
分类号 G06F1/04;G11C11/407;G11C11/4076;H03D3/24;H03K5/04;H03K5/13;H03K5/156;H03L7/06;H03L7/08;H03L7/081;H03L7/089;H04L7/033;(IPC1-7):H03L7/08 主分类号 G06F1/04
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