发明名称 |
Systems and methods for testing integrated circuits |
摘要 |
Systems and methods for testing integrated circuits are provided. One such method comprises: providing a target fault list corresponding to an integrated circuit, the target fault list including at least a first fault and a second fault; measuring a relationship between the first fault and the second fault, the relationship corresponding to which of the first fault and the second fault is more readily detected by automatic test pattern generation; ordering the first fault and the second fault within the target fault list in a manner corresponding to the relationship; and performing automatic test pattern generation based upon an order of the faults of the target fault list. Systems and other methods also are provided.
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申请公布号 |
US6707313(B1) |
申请公布日期 |
2004.03.16 |
申请号 |
US20030369069 |
申请日期 |
2003.02.19 |
申请人 |
AGILENT TECHNOLOGIES, INC. |
发明人 |
ROHRBAUGH JOHN G;REARICK JEFF |
分类号 |
G01R31/3181;(IPC1-7):G01R31/26 |
主分类号 |
G01R31/3181 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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