发明名称 Method of operating circuit with FET transistor pair
摘要 A method for use with a switch having a field-effect transistor (FET). The method includes restricting the drain-source voltage of the FET to a predetermined range, and then switching the FET. In general, in one aspect, the invention features a circuit having source, drain and gate terminals. The circuit includes a first FET having a first drain coupled to the drain terminal and a first source coupled to the source terminal, a second FET having a second drain coupled to the drain terminal and a second source coupled to the source terminal, and a control circuit coupled to the gate terminal, the first gate, and the second gate.
申请公布号 US6703888(B1) 申请公布日期 2004.03.09
申请号 US20020327586 申请日期 2002.12.20
申请人 VOLTERRA SEMICONDUCTOR CORPORATION 发明人 YOU BUDONG;ZUNIGA MARCO A.
分类号 H03K5/08;H03K5/15;H03K17/16;H03K17/30;(IPC1-7):H03K17/687;H03K5/22 主分类号 H03K5/08
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