| 摘要 |
PURPOSE: A method for fabricating a capacitor is provided to fabricate effectively an SOC(Silicon-On-Chip) by integrating DRAMs and logic elements. CONSTITUTION: A word line transistor(14) and an insulating layer(16) are stacked on a semiconductor substrate(10). A contact hole(18) is formed by performing a masking etch process. A bottom electrode layer(20) and a bottom electrode insulating layer(22) are alternately stacked on the resultant structure. A photoresist layer is stacked thereon. A stacked structure is formed by etching sequentially the bottom electrode insulating layer(22) and the bottom electrode layer(20). A conductive layer(24) is formed by growing selectively silicon on the bottom electrode. A connective conductive layer(26) is formed between bottom electrode layers. A capacitor insulating layer(28) is formed on an external side of the stacked structure. A capacitor top electrode(30) is formed on an external side of the capacitor insulating layer(28).
|
