| 摘要 |
<p>PCT No. PCT/FR96/01541 Sec. 371 Date Mar. 26, 1998 Sec. 102(e) Date Mar. 26, 1998 PCT Filed Oct. 1, 1996 PCT Pub. No. WO97/14120 PCT Pub. Date Apr. 17, 1997A logic machine and a circuit for producing an authentication code for authenticating smart cards which include a cycle of steps wherein a bit word is read out of a secret memory with a plurality of bit words, and words read out during previous cycles are combined. The result of the combination is used as a generator word for generating the address of the word to be read out in the next cycle.</p> |
