| 摘要 |
PURPOSE: A pad and a peripheral circuit layout of a semiconductor memory device are provided where data lines of memory cell array banks have the same length each other. CONSTITUTION: The semiconductor memory device(100) includes a plurality of memory cell array blocks(110,111,112,113), and a control circuit which is arranged between the memory cell array blocks and outputs control signals to control the memory cell array blocks. The memory cell array block includes a plurality of memory cell array banks(120_A,120_B,120_C,120_D) comprising a plurality of memory cells, and decoders(130_A,130_B,140_A,140_B) arranged between the memory cell array banks, and a data pad arranged between the memory cell array banks, and a pad control circuit which is arranged adjacent to the data pad and receives control signals from the control circuit.
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