发明名称 System level simulation method and device
摘要 The system level simulation method of the present invention comprises the steps of: dividing the simulation target device into a first circuitry portion and a second circuitry portion; emulating the first circuitry portion by an emulation subject circuit constructed by a rewritable hardware; simulating the second circuitry portion by a partial circuit process substitute section constructed by software; and allowing communication of data between the emulation subject circuit and the partial circuit process substitute section.
申请公布号 US2003229486(A1) 申请公布日期 2003.12.11
申请号 US20030419151 申请日期 2003.04.21
申请人 NEC CORPORATION 发明人 ITO YOSHIYUKI
分类号 G06F17/50;(IPC1-7):G06F9/455 主分类号 G06F17/50
代理机构 代理人
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