发明名称 FAILURE ANALYSIS APPARATUS AND METHOD OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A failure analysis apparatus and method of a semiconductor device are provided to be capable of simply checking the main failure factor of each failure bit mode corresponding to a test mode per each wafer. CONSTITUTION: A failure analysis apparatus of a semiconductor device is provided with a wafer map memory(102), a block(104) for calculating the number and rate of failure dies, a D/S(Die/Sorting) and FBM(Fail Bit Map) calculating block(106), a control block(108), and a memory block(110). The failure analysis apparatus of a semiconductor device further includes the first failure die rate calculating block(112), the second failure die rate calculating block(114), an expected FBM and D/S calculating block(116), a mean D/S yield calculating block(118), a maximum and minimum yield calculating block(120), and a monitor(122).
申请公布号 KR20030087130(A) 申请公布日期 2003.11.13
申请号 KR20020024701 申请日期 2002.05.06
申请人 DONGBU ELECTRONICS CO., LTD. 发明人 HONG, GI WON
分类号 H01L21/66;(IPC1-7):H01L21/66 主分类号 H01L21/66
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