发明名称 |
MANUFACTURING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND SEMICONDUCTOR INSPECTION DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To perform a burn-in inspection and a probe inspection at a wafer level even under a condition that a chip is divided into multiple pins, a test pad is turned to have a narrow pitch and a scribe region between adjacent chips is narrowed. SOLUTION: All the chips 51 within a wafer 4 to be inspected are covered by a semiconductor inspection device by a plurality of times of contacts of the device. By selecting the chips 51 to be inspected per contact by each other column within the main surface of the wafer 4 to be inspected for instance, all the chips 51 within the wafer 4 to be inspected can be covered by twice the contact. COPYRIGHT: (C)2004,JPO
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申请公布号 |
JP2003297887(A) |
申请公布日期 |
2003.10.17 |
申请号 |
JP20020098519 |
申请日期 |
2002.04.01 |
申请人 |
HITACHI LTD |
发明人 |
BAN NAOTO;HASEBE AKIO;NANBA IRIZOU;MOTOYAMA YASUHIRO;KONO RYUJI |
分类号 |
G01R31/26;G01R1/073;G01R31/28;H01L21/66;H01L21/822;H01L27/04;(IPC1-7):H01L21/66 |
主分类号 |
G01R31/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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