发明名称 |
Circuit and associated method for the erasure or programming of a memory cell |
摘要 |
A circuit produces a voltage for the erasure or programming of a memory cell. The circuit includes a capacitor, and a discharge circuit connected to a first terminal of the capacitor. The discharge circuit includes a first transistor, a drain of which is connected to the first terminal of the capacitor. The first transistor activates the discharge circuit when a discharge signal is received by a gate of the first transistor. The discharge circuit includes a slow discharge arm and a fast discharge arm parallel-connected to the source of the first transistor. The discharge circuit produces a low discharge current or a high discharge current for discharging the capacitor as a function of an operating mode selection signal.
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申请公布号 |
US6621737(B2) |
申请公布日期 |
2003.09.16 |
申请号 |
US20020096531 |
申请日期 |
2002.03.11 |
申请人 |
STMICROELECTRONICS SA |
发明人 |
NAURA DAVID;BERTRAND BERTRAND;CHEHADI MOHAMAD |
分类号 |
G11C16/12;(IPC1-7):G11C16/06 |
主分类号 |
G11C16/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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