发明名称 |
Non-linear decision feedback phase locked loop filter |
摘要 |
Systems, devices and methods are provided for precisely and responsively compensating for deterministic jitter. One aspect of the present subject matter is a circuit for improving a phase lock of a timing signal for a receiver. One embodiment includes a sample and hold circuit, a decision logic module, and a switch. The sample and hold circuit is adapted to receive and hold a phase signal that represents a signal from a phase detector of the receiver. The switch is adapted to controllably pass the phase signal from the sample and hold circuit. The passed phase signal is capable of being used in adjusting the timing signal for the receiver. The decision logic module is adapted to detect good signal transitions, and actuate the switch to pass the phase signal for good signal transitions. Other aspects are provided herein.
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申请公布号 |
US2003165208(A1) |
申请公布日期 |
2003.09.04 |
申请号 |
US20020090435 |
申请日期 |
2002.03.04 |
申请人 |
CARTER ANDREW;MACTAGGART IAIN ROSS |
发明人 |
CARTER ANDREW;MACTAGGART IAIN ROSS |
分类号 |
H03L7/089;H03L7/093;H04L7/00;H04L7/033;(IPC1-7):H03D3/24 |
主分类号 |
H03L7/089 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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