发明名称 Distributed mechanism for resolving cache coherence conflicts in a multi-node computer architecture
摘要 According to one embodiment, a method is disclosed. The method comprises receiving a read request from a first node in a multi-node computer system to read data from a memory at a second node. Subsequently, a write request from a third node is received to write data to the memory at the second node. The read request and write request is detected at conflict detection circuitry. Finally, read data from the memory at the second node is transmitted to the first node.
申请公布号 US6615319(B2) 申请公布日期 2003.09.02
申请号 US20000752937 申请日期 2000.12.29
申请人 INTEL CORPORATION 发明人 KHARE MANOJ;LOOI LILY P.;KUMAR AKHILESH;BRIGGS FAYE A.
分类号 G06F12/08;(IPC1-7):G06F12/00 主分类号 G06F12/08
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