发明名称 Semiconductor memory device capable of reading at high speed
摘要 A sense amplifier band placed between two memory cell arrays includes: equalize circuits equalizing bit line pairs of the first memory cell array; and equalize circuits equalizing bit line pairs of the second memory cell array; and in addition, equalize circuits for initializing sense amplifiers. The sense amplifiers are initialized by equalize signals in pulse in response to an instruction of activation of one word line of the first and second memory cell arrays. Therefore, since data read out in the previous time is held in the sense amplifier, the data held in the sense amplifier can be read out at high speed without activation of a word line.
申请公布号 US2003156486(A1) 申请公布日期 2003.08.21
申请号 US20020223000 申请日期 2002.08.19
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 TANAKA SHINJI
分类号 G11C7/06;G11C7/12;G11C11/4091;G11C11/4094;(IPC1-7):G11C8/00 主分类号 G11C7/06
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