发明名称 |
Process integration of Si1-xGex CMOS with Si1-xGex relaxation after STI formation |
摘要 |
A method of forming a CMOS device includes preparing a silicon substrate, including forming plural device regions on the substrate; epitaxially forming a strained SiGe layer on the substrate, wherein the SiGe layer has a germanium content of between about 20% and 40%; forming a silicon cap layer epitaxially on the SiGe layer; depositing a gate oxide layer; depositing a first polysilicon layer; implanting H+ ions to a depth below the SiGe layer; forming a trench by shallow trench isolation which extends into the substrate; annealing the structure at a temperature of between about 700° C. to 900° C. for between about five minutes to sixty minutes; depositing an oxide layer and a second polysilicon layer, thereby filling the trench; planarizing the structure to the top of the level of the portion of the second polysilicon layer which is located in the trench; and completing the CMOS device. |
申请公布号 |
US6583000(B1) |
申请公布日期 |
2003.06.24 |
申请号 |
US20020072183 |
申请日期 |
2002.02.07 |
申请人 |
SHARP LABORATORIES OF AMERICA, INC. |
发明人 |
HSU SHENG TENG;LEE JONG-JAN;MAA JER-SHEN;TWEET DOUGLAS JAMES |
分类号 |
H01L21/28;H01L21/76;H01L21/762;H01L21/8238;H01L27/08;H01L27/092;H01L29/423;H01L29/49;H01L29/78;(IPC1-7):H01L21/823 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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