发明名称 |
Frequency-compensated, multistage amplifier configuration and method for operating a frequency-compensated amplifier configuration |
摘要 |
A frequency compensation circuit includes a first and a second compensation capacitor for a frequency-compensated amplifier to which a chopped useful signal can be supplied. In a first clock phase, the useful signal is respectively supplied to the first compensation capacitor, and in a second clock phase the useful signal is respectively supplied to the second compensation capacitor. As a result, a stable, frequency-compensated amplifier is specified in which charge reversal in the frequency compensation capacitors or Miller capacitors is avoided, making possible a configuration with a small chip area. The principle is suited particularly to Hall sensors operated in chopped mode. |
申请公布号 |
US2003102908(A1) |
申请公布日期 |
2003.06.05 |
申请号 |
US20020331534 |
申请日期 |
2002.12.30 |
申请人 |
AUSSERLECHNER UDO;MOTZ MARIO |
发明人 |
AUSSERLECHNER UDO;MOTZ MARIO |
分类号 |
H03F1/08;(IPC1-7):H03F1/02;H03F1/14;H03F3/38 |
主分类号 |
H03F1/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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