发明名称 |
Semiconductor memory module has regulator circuit to output voltage lower than source voltage of semiconductor memory, to output circuit |
摘要 |
The module has a semiconductor memory (11) and a regulator circuit (14) supplied with an external voltage (VDD) through a power terminal (8). The memory (11) outputs a read start (RD) signal to the output circuit (12), and the transistor in the regulator circuit pulls down the source voltage to supply output voltage (VSSQ) that is less than the external voltage, to the output circuit, in response to the read start signal.
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申请公布号 |
DE10223763(A1) |
申请公布日期 |
2003.05.28 |
申请号 |
DE20021023763 |
申请日期 |
2002.05.28 |
申请人 |
MITSUBISHI DENKI K.K., TOKIO/TOKYO |
发明人 |
KAJIMOTO, TAKESHI |
分类号 |
H01L27/04;G11C11/407;G11C11/409;H01L21/822;H02M1/08;H03K19/00;H03K19/0175;H03K19/0185;(IPC1-7):H01L23/58;H03K19/003 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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