| 摘要 |
A multiple output spread spectrum clock circuit is provided that reduces electromagnetic emissions when two different clocks operate at frequencies which overlap one another. Two such clock circuits are controlled so as to introduce a phase difference between the clocks as they operate through their spread spectrum profiles. The "best" phase differences are around 18%, or around 50%, between adjacent spread spectrum clock outputs. The phase difference can be controlled by starting the first clock (SSCG #1) at one point in time, while temporarily delaying the start of the second clock (SSCG #2) until the appropriate moment; alternatively, it can be controlled by starting both clocks at the same moment in time, however, SSCG #1 begins at one point in the spread spectrum profile, while SSCG #2 begins at a different point in its spread spectrum profile.
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