发明名称 MULTILAYER INTERCONNECTION SUBSTRATE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a multilayer interconnection substrate having ultra-high density wiring on an uppermost surface layer and to provide a simple method for manufacturing the multilayer interconnection substrate. SOLUTION: The multilayer interconnection substrate 1 comprises wiring 4 formed on a core substrate via an electrically insulating layer. The substrate 1 further comprises the uppermost surface layer having wiring arranged on a lower surface via the electrically insulating layer 7, and a via 5 for connecting the wiring to predetermined sites of the lower layer wiring in such a manner that the surface of the uppermost surface layer is flat, a diameter of a bump 6 for constituting the via of the uppermost surface layer is 100μm or less, the surface of the via is flat, and a line and space of the highest density part of the wiring of the uppermost surface layer is in a range of 5μm/5μm to 20μm/20μm. Such a multilayer interconnection substrate can be manufactured by transferring fine pattern wiring 4 and the bump 6 onto the core substrate 2 via an insulating adhesive layer and laminating them thereon.
申请公布号 JP2003086946(A) 申请公布日期 2003.03.20
申请号 JP20010276083 申请日期 2001.09.12
申请人 DAINIPPON PRINTING CO LTD 发明人 KURAMOCHI SATORU
分类号 H05K1/11;H05K3/24;H05K3/40;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K1/11
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