发明名称 |
Current-limiting logic interface circuit |
摘要 |
A circuit of interface between a logic sensor and a logic input isolation barrier of a processing circuit, including an element of protection against input overvoltages, a current-limiting circuit connected in series between an input terminal and an output terminal of the interface circuit, and a control stage connected in parallel with the galvanic isolation element to be controlled to control the logic states thereof, the control stage inhibiting the operation of the galvanic isolation element if the input current is smaller than a predetermined threshold.
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申请公布号 |
US2003048008(A1) |
申请公布日期 |
2003.03.13 |
申请号 |
US20020242518 |
申请日期 |
2002.09.12 |
申请人 |
CASTAGNET THIERRY;LADIRAY OLIVIER |
发明人 |
CASTAGNET THIERRY;LADIRAY OLIVIER |
分类号 |
H03K17/94;(IPC1-7):H02B1/24 |
主分类号 |
H03K17/94 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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