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发明名称
REDUNDANT DUAL BANK ARCHITECTURE FOR A SIMULTANEOUS OPERATION FLASH MEMORY
摘要
申请公布号
KR20030009310(A)
申请公布日期
2003.01.29
申请号
KR20027005092
申请日期
2002.04.19
申请人
发明人
分类号
G06F12/16;G11C15/00;G11C16/06;G11C29/00;G11C29/04
主分类号
G06F12/16
代理机构
代理人
主权项
地址
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