| 摘要 |
The present invention discloses methods for fabricating a semiconductor device. A gate electrode having a hard mask layer at its upper portion is formed, and an interlayer insulating film is formed over the resultant structure. A landing plug contact hole is formed by etching the interlayer insulating film, and a conductive layer is formed over the resultant structure, filling up the landing plug contact hole. A first CMP process is performed to expose the hard mask layer, and a second CMP process is preformed to planarize the hard mask layer, the interlayer insulating film and the landing plug conductive layer. The CMP processes of the present invention reduce or prevent dishing of the mask insulating film or contact plug, to reduce or prevent the likelihood of a bridge forming between adjacent conductive plugs. As a result, the semiconductor device has improved properties and/or improved yield.
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