发明名称 IMPROVED LOCK DETECTOR FOR QPSK DEMODULATOR
摘要 PURPOSE: An improved lock detector for QPSK(Quadrature Phase Shift Keying) demodulator is provided to distinguish correctly distortion of input signals within a short time by using a shift right portion, an adder, a threshold value, and hysteresis. CONSTITUTION: An unbalance signal interception portion(510) generates predetermined values by using a plurality of shift right portions(521,531) and a plurality of adders(523,533) if signals of lk and Qk are inputted into a lock detector. A plurality of code extraction portions(541,543) extract signs of the calculated values in order to improve a calculation speed. A sign selection portion(547) receives output values from the code extraction portions(541,543). An accumulator(549) is used for accumulating output values of the sign selection portion(547). A low pass filter(551) and a hysteresis portion(553) are used for filtering noise. An interception portion(560) for intercepting values under threshold value and an interception portion(570) for intercepting a value exceeding a gain control value are used for preventing the generation of lock signals.
申请公布号 KR20020096242(A) 申请公布日期 2002.12.31
申请号 KR20010034570 申请日期 2001.06.19
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHO, GYEONG SEOK
分类号 H04L27/22;(IPC1-7):H04L27/22 主分类号 H04L27/22
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